1. Field of the Invention
This invention relates to semiconductor devices, and in particular to integrated circuits containing lateral transistors of higher speed, smaller size, and higher packing density than those heretofore existing.
2. Prior Art
Lateral transistors are well known and have been employed in integrated circuit technology for some time. See, for example, U.S. Pat. No. 3,571,674 entitled "Fast Switching PNP Transistor" and issued Mar. 23, 1971 to Yu et al. Conventional lateral transistors, however, and in particular PNP lateral transistors, have operated at frequencies much lower than desirable for modern integrated circuits. This relatively low frequency response has been substantially attributed to two factors. First, the relatively large base width of the lateral transistor increases the transit time for minority carriers passing through the base from the emitter. The relatively large base width results principally from the minimum photoresist line width consistently available during manufacture of the devices. Second, for a given amount of base impurity, the uniform base concentration profile further increases the transit time over that achievable in devices having graded base concentration profiles.
Double-diffused vertical transistors are also well known. See, for example, U.S. Pat. No. 3,025,589 entitled "Method of Manufacturing Semiconductor Devices," issued Mar. 20, 1962, to Hoerni and U.S. Pat. No. 3,648,125 entitled "Method of Fabricating Integrated Circuits with Oxidized Isolation and the Resulting Structure" issued Mar. 7, 1972 to Peltzer. The process by which vertical double-diffused transistors are made has several advantages over other processes, such as the mesa process. First, the base width of the transistor can be varied by controlling the diffusion processes, rather than by altering the dimensions of the masks used in the diffusion processes. Second, the concentration profile of the base can be graded; that is, the base impurity concentration at the emitter-base junction can be made greater than the base impurity concentration at the collector-base junction. It is well known that increases in this differences for a given amount of base impurity increase the high frequency response of the transistor. See Transistor Engineering, by A. B. Phillips, McGraw-Hill, 1962.
In summary, prior art integrated circuits have included vertical double-diffused NPN and PNP transistors, and lateral NPN and PNP transistors with a uniform concentration of base dopant. Because the frequency response of lateral PNP transistors has been lower than desired, the prior art integrated circuits for applications requiring high frequency response have typically used (1) NPN type lateral transistors, as these are approximately three times faster than PNP type lateral transistors, or (2) complementary double-diffused vertical PNP and NPN devices on the same chip. The first alternative eliminates PNP transistors from many applications where their use would otherwise be beneficial. The second alternative involves the technology of complementary vertical double-diffused transistor -- a very complicated technology resulting in many defects in the wafers, and a low yield, high cost product. Additionally, the complementary double-diffused vertical NPN and PNP transistors have large masking tolerances and thus their packing density is lower than desirable.
Accordingly, some objectives of this invention are: (1) to produce double-diffused, lateral transistors capable of higher frequency response than that heretofore obtained with lateral transistors; (2) to fabricate a lateral transistor structure utilizing as simple a process as possible; (3) to make such a structure smaller than existing structures of the same type; and (4) to make such a structure easily adaptable for use in complementary PNP/NPN devices.